industrialNETworX

Hi,

those flags are not implemented. However starting with V2.1.1.0 it is possible to do the required handling for switching DC modes on the host side.
To get those values related to the DC configuration, it is required to use Confirmed AL Status Services.

The indication ECAT_ESM_ALCONTROL_CHANGE_IND will deliver the required DC configuration which has to be checked and used. In addition, the configuration has to be placed into the ECAT_DPM-task by the packet ECAT_DPM_SET_UPDATE_CFG_REQ.

The version V0.97.1 build 2 does not support that.

That interrupt provided via the DPM would still have some us of jitter in it. So, if you need to have sub-microsecond accuracy, it would require the SYNC pins which are not provided on the cifX50RE.

However, it is possible to use the IRQ for those synchronization purposes. If the particular update configuration has been set.

Hi th_elste,

the indications can be used as long as the actual Register packet has been send.

This is a requirement as not all application may like certain configuration like particular SYNC cycle configurations.

The SynC Unit is only generating the interrupts to the ARM. These get relayed by a particular configuration with ECAT_DPM_SET_UPDATE_CFG_REQ, so that it is possible to get the handshakes only exchanged back by the netX in case e.g. a SYNC0 or Sm2 Event and so on has been encountered.

If the ECAT_DPM_SET_UPDATE_CFG_REQ configures the Sm2 for SYNC0 coupled and disables host-side triggered update. The Handshakes of the area reflecting the master output data will be toggled back to the host only if a SYNC0 event has been encountered.

Please keep in your mind, that the C-Toolkit does not support IRQs in the current version.

Hi,

please check the Hilscher web page for the latest manuals.

Hi,

the bBusSyncTrigger is currently not used.

/******************************************************************************
 * Packet: ECAT_DPM_SET_UPDATE_CFG_REQ/ECAT_DPM_SET_UPDATE_CFG_CNF
 *
 * Remarks: for use together with Confirmed AlStatus services to control internal update handling on state change PreOp->SafeOp and on 0x1c32/0x1c33 writes handled by host
 */
 
/* request packet */
typedef __PACKED_PRE struct ECAT_DPM_SET_UPDATE_CFG_REQ_DATA_Ttag
{
  /* Host update on Sm2 enabled */
  TLR_BOOLEAN8                fHostTriggeredUpdateOnSm2Enabled;
  /* Host update on Sm3 enabled */
  TLR_BOOLEAN8                fHostTriggeredUpdateOnSm3Enabled;
  /* Device update trigger mode for Sm2 (see ECAT_DPM_SET_UPDATE_CFG_MODE_*) */
  TLR_UINT8                   bDeviceTriggeredUpdateOnSm2Mode;
  /* Device update trigger mode for Sm3 (see ECAT_DPM_SET_UPDATE_CFG_MODE_*) */
  TLR_UINT8                   bDeviceTriggeredUpdateOnSm3Mode;
  /* Device update trigger mode for Bus-Sync handshake
   * (see ECAT_DPM_SET_UPDATE_CFG_MODE_*)
   * (except ECAT_DPM_SET_UPDATE_CFG_MODE_MODE_FREERUN and ECAT_DPM_SET_UPDATE_CFG_MODE_MODE_SELF)
   */
  TLR_UINT8                   bBusSyncTrigger;
} __PACKED_POST ECAT_DPM_SET_UPDATE_CFG_REQ_DATA_T;
 
/* value of fHostTriggeredUpdateOnSm* will be ignored on particular Sm and automatically enabled */
#define ECAT_DPM_SET_UPDATE_CFG_MODE_MODE_FREERUN      0      
 
/* self-triggered means its own event e.g. Sm2 update on Sm2 event */
#define ECAT_DPM_SET_UPDATE_CFG_MODE_MODE_SELF         1       
 
/* update is handled on Sync0 event */
#define ECAT_DPM_SET_UPDATE_CFG_MODE_MODE_SYNC0        2        
 
/* update is handled on Sync1 event */
#define ECAT_DPM_SET_UPDATE_CFG_MODE_MODE_SYNC1        3       
 
/* update is handled on Sm2 event */ 
#define ECAT_DPM_SET_UPDATE_CFG_MODE_MODE_SM2         34        
 
/* update is handled on Sm3 event */
#define ECAT_DPM_SET_UPDATE_CFG_MODE_MODE_SM3         35        
 
typedef struct ECAT_DPM_SET_UPDATE_CFG_REQ_Ttag
{
  TLR_PACKET_HEADER_T                         tHead;
  ECAT_DPM_SET_UPDATE_CFG_REQ_DATA_T          tData;
} ECAT_DPM_SET_UPDATE_CFG_REQ_T;
 
/* confirmation packet */
typedef struct ECAT_DPM_SET_UPDATE_CFG_CNF_Ttag
{
  TLR_PACKET_HEADER_T                         tHead;
} ECAT_DPM_SET_UPDATE_CFG_CNF_T;

Hi,

#define ECAT_DPM_SET_UPDATE_CFG_REQ 0x00002CCC

This is defined in the Ecs_Public.h :wink:

Hi,

maybe this is located to your used version of the stack. Are you still using the version 0.97.1 build 2?

You should get in contact with Hilscher to get an update of the stack.

Yeah, that would be a good idea. Hilscher should catch this idea and put it onto their web page.

Hi,

the synchronization mechanism provided by the DC is meant for providing a common time reference.
This common time reference is used to produce SYNC signals and interrupts on the EtherCAT slave controller. So, if you need a specific time point in every bus cycle, the Sync Unit will provide that.

However, it is NOT linked to the clock of your PC.

Even though, it is possible to read the DC systime directly from the Esc, there is currently no field accessible via DPM providing that System Time to the host.

The actual common time reference start is set up on behalf of the master. The slave cannot influence what value the System Time has for a specific time point.

Greets,

code-small