Poor instruction execution speed
Hi,
I wrote this:
*PIO_OUT|=PIO08mask; *PIO_OUT&=~PIO08mask;
Using compiler optimization level 1, I got:
//*PIO_OUT|=PIO08mask; ldr r3,[r4] orr r3,r3, #100h str r3,[r4] //*PIO_OUT&=~PIO08mask; ldr,[r4] bic r3,r3, #100h str r3,[r4]
it generates a high pulse on pin 140ns wide, it means ~47ns/istruction.
1)First thing that sounds strange: 200MIPS should be very(~10 times) faster!
It's a discouraging speed.
2)About code generation: PIO08mask has only a bit 1 and ~PIO08mask has only a bit 0,
then pin toggling could be coded with ORN, BIC, BFC or BFI instruction in the ARM set(or maybe it can't cause family ARMv5TEJ hasn't this instruction)?
thanks for any information!!
M T
Hilscher Gesellschaft für Systemautomation mbH
I assume you have the I-Cache disabled.
What do you expect from a CPU which runs at 200MHz, when it needs to access the memory with 100MHz (or slower, depending on the Timing). Right. Not "true" 200 MHz performance.
Try to enable the instruction cache and check the "new" results.
To your second question:
Try compiling this code with -O2/3 to see the results. O1 is really not very highly optimized code.
But on the first look i don't see where the compiler should optimize your code. If PIO_OUT is volatile it needs to reread it before masking out the bit again. And as the ARM is a load-store architecture there is no way to modify memory addresses directly with a single instruction.
BTW: Any OS (or other stuff) running, which might "disturb" you by handling an IRQ during this time?
Regards
MT