industrialNETworX

Hi Rainer,

the watchdog works in two stages: When the IRQ timeout counter has reached zero, an Interrupt is
generated, to indicate that the watchdog will soon perform a reset and needs attention. Maybe you can use this IRQ to set the TSTOutn Bit.

The Watchdog generates an IRQ. Yes, you must program your own ISR.

The Watchdog generates an IRQ. Maybe you can have a look to the Watchdog example which is available on the Hilscher web page.

You must create a new IRQ instance for your watchdog IRQ. You can do it in the same way like in your posted example.

Instead of the "SRT_NETX_VIC_IRQ_STAT_timer0" you must use "SRT_NETX_VIC_IRQ_STAT_watchdog".

/*
************************************************************
*   Definition of the Interrupt-Instances
************************************************************
*/
STATIC CONST FAR RX_INTERRUPT_SET_T tMyIntt[] = {
  {{"SYSTIMER",RX_PERIPHERAL_TYPE_INTERRUPT,0},  /* System Timer interrupt */
    SRT_NETX_VIC_IRQ_STAT_timer0,                 /* Use external Timer0 Interrupt */
    29,                                           /* Priority 29 */
    RX_INTERRUPT_MODE_SYSTEM,                     /* Allow interrupt to be a thread */
    RX_INTERRUPT_EOI_AUTO,                        /* EOI self by RX */
    RX_INTERRUPT_TRIGGER_RISING_EDGE,             /* Edge triggered */
    RX_INTERRUPT_PRIORITY_STANDARD,               /* Normal Priority */
    RX_INTERRUPT_REENTRANCY_ENABLED,              /* Interrupt itself is reentrant */
  },
{{"WATCHDOG",RX_PERIPHERAL_TYPE_INTERRUPT,0},  /* System Timer interrupt */
    SRT_NETX_VIC_IRQ_STAT_watchdog,                 /* Use Watchdog Interrupt */
    28,                                           /* Priority 29 */
    RX_INTERRUPT_MODE_SYSTEM,                     /* Allow interrupt to be a thread */
    RX_INTERRUPT_EOI_AUTO,                        /* EOI self by RX */
    RX_INTERRUPT_TRIGGER_RISING_EDGE,             /* Edge triggered */
    RX_INTERRUPT_PRIORITY_STANDARD,               /* Normal Priority */
    RX_INTERRUPT_REENTRANCY_ENABLED,              /* Interrupt itself is reentrant */
  }
};


RX_HANDLE hInt;

erXRes = rx_MemAllocateMemmor(&hInt,DRV_INTERRUPT_SIZE);

erXRes=Drv_IntCreateInterrupt(hInt,tMyInt[0]);

erXRes=Drv_IntIdentifyInterrupt("SysTimer",0,&hInt);

erXRes=Drv_IntIdentifyInterrupt("Watchdog",0,&hInt);

erxRes=Drv_IntInitializeInterrupt(hInt,MyISR,Null);

erxRes=Drv_IntEnableInterrupt(hInt);

This is not tested. It is only an example snippet!

Hi AJ,

What happens, for e.g. when the 25 MHz quartz is not running. Who manage the watchdog intterupt for RSTOutn Pin ?

Is it possible to trigger the RSTINn pin with an external device, when the 25 MHz quartz is not running ?

Br,
Rainer

HI AJ,

RSTINn:

Do I understand, that this pin makes a reset and set the PIO and GPIO in definition state, when the 25 MHz quartz is not running ?

Br,
Rainer

The easiest and probably best way to implement a Reset signal from the netX to an external hardware is as follows:

If the reset input of your external hardware is active low (signal has low level -> external device is in reset state), then connect it to the RST_OUT signal and attach a pull-down resistor (e.g. 2.2kOhm) to this signal.

After power up of the system, the RST_OUT pin of the netX is always floating and the pull-down holds the external hardware in reset. Now change the state of the RST_OUT signal to high level by writing the Reset Control Register and the external hardware will come out of reset.

(If your external hardware has an active high reset input, then use a pull-UP resistor instead).

Whenever the netX is now reset (e.g. by the watchdog timer), the driver of the RST_OUT pin will automatically be disabled and the RST_OUT signal will become active through the pull-down (or pull-up) resistor, holding also the external hardware in reset.

Very simple, just one external component (pull-up or pull-down resistor), no ISR.

As for the RSTINn input:

This is a synchronous input, hence it only works when the system clock is running.
The PORn (Power On Reset) works asynchronously and hence resets the chip completely even if the internal oscillator may have not yet started or has stopped for whatever reason.

@Rainer Versteeg:

> What happens, for e.g. when the 25 MHz quartz is not running. Who manage the watchdog intterupt for RSTOutn Pin ?

The system clock is the base for any functionality within the netX. The watchdog timer is basically a counter and it can only count (and react in relation to the counter value) as long as there actually IS something to count.
No system clock = nothing to count.

-> If your system clock fails (e.g. because your external crystal or the netX oscillator / PLL becomes defective), then there will also be no reset from the watchdog.
As for the netX, this is hardly a problem, as it makes little sense to reset a defective hardware (if the system clock generation doesn't work, the chip will not come up again anyway).

If your system requires that your external hardware will be held in reset state if the system clock of the netX fails, then you must use an external watchdog unit.