USB HOST DRIVER
Dear MT:
:o
I learn the openHCI specification these days, I have a lot of question which I want to discuss with you.I found that ther driver of SL811 will be a template for me. I wonder which register will start the transfer of the ED. I think it is the HcCommand status register in the chapter 7 in the openHCI specification.I see this code in ohci-q.c in dirvers/usb/host
static void td_submit_urb (
struct ohci_hcd *ohci,
struct urb *urb
){..........
ohci_writel (ohci, OHCI_CLF, &ohci->regs->cmdstatus);}
Is that right?
Dear MT:
Though netx500 is not base on OHCI,however I haven't writen a USB host driver before,so OHCI will be usefull for me to know the usb processing procedure -the ED,TD and so on.
thank you for your reply!
best regards!
Dear MT:
I am using netx otg now,we just need it to be a host .
So I connect the left six pin J3 on the nxdb500 board to make it as host.
here is my probe function ,It only can issue a Power status interrupt ,I want to have a Connect/Disconnect Event interrupt, when I insert a USB keyboard plot into the host port on nxdb500 board.
Is there anything I missed to set?
netx_write(netx,REL_NETX_USB_CORE_CTRL ,MSK_NETX_USB_CORE_CTRL_reset);//software reset
/* set ID pullup */
netx_write(netx,REL_NETX_USB_CORE_CTRL ,0x0008);//
reg_val=ID_PU;
netx_write(netx,REL_NETX_USB_PORT_CTRL, reg_val);
netx_write(netx,REL_NETX_USB_CORE_CTRL ,MSK_NETX_USB_CORE_CTRL_alt_buffer_support);//8 alter buffer
//0x00120004 USB Control register
reg_val=PSE|HRS|ASE;
netx_write(netx,REL_NETX_USB_CTRL,reg_val);
//0x00120030 USB Port control Register
reg_val=VB_ON|TERM_ENA|PENA;
netx_write(netx, REL_NETX_USB_PORT_CTRL ,reg_val|ID_PU);//via ID_PU to update USB Connector ID Value bit
//0x00120038 USB Port Status Change Event Mask Register
reg_val=CDC_EM;
netx_write(netx,REL_NETX_USB_PORT_STAT_CHG_EV_MSK,reg_val);
//0x00120010 USB Main Event Mask Register
reg_val=GPIPE_EM|GPORT_EM;
netx_write(netx,REL_NETX_USB_MAIN_EV_MSK ,reg_val);
usb_configurePipes(netx);
I want a CDC_EV interrupt ,I think it is nothing to do with pipe configuration.
M T
Hilscher Gesellschaft für Systemautomation mbH
Dear MT:
I am using netx otg now,we just need it to be a host .
So I connect the left six pin J3 on the nxdb500 board to make it as host.
here is my probe function ,It only can issue a Power status interrupt ,I want to have a Connect/Disconnect Event interrupt, when I insert a USB keyboard plot into the host port on nxdb500 board.
Is there anything I missed to set?
Take a look at the schematics. The USB device you are connecting needs power from the board. The power supply to the external device must be enabled through GPIO12 on the board. Maybe you have noticed that your keyboard never enabled any of the LEDs, or your optical mouse stays dark?
So set GPIO12 to low output and you should be ready to go.
Regards
MT
Dear MT:
I found that yesterday,however,it is no use! The USB_ON on T1 is low level ,and the VBUS of the host port is 4.9V now.
when I insert a USB disk,the led is on!
thank you !
I am finding irq problem.
static irqreturn_t netx_irq(struct usb_hcd *hcd)
{
struct netx *netx = hcd_to_netx(hcd);
unsigned reg_val=0;
disable_irq(NETX_IRQ_USB);
netx_write(netx,REL_NETX_USB_PORT_STAT_CHG_EV ,PWRSC_EV);
return IRQ_HANDLED;
}
It can clear the PWRSC_EV interrupt ,may be disable_irq() stop interrupt occur.If I do not use disable_irq() ,it can't exit from Interrupt
like these:
irq 11: nobody cared (try booting with the "irqpoll" option)
[ 2.210000] [
[ 2.210000] [
[ 2.210000] r4:00000000
[ 2.210000] [
[ 2.210000] [
[ 2.210000] r6:c046a824 r5:c040e4f0 r4:0000000b
[ 2.210000] [
[ 2.210000] Exception stack(0xc050fe60 to 0xc050fea8)
[ 2.210000] fe60: 000016c8 000016c8 c041acc0 c0427ecc 000016c8 000016c8 c040c328 00001693
[ 2.210000] fe80: 60000013 ffffe938 c040c328 c050fed4 000016c8 c050fea8 c003c97c c003c980
[ 2.210000] fea0: 60000013 ffffffff
[ 2.210000] r7:00001693 r6:00000802 r5:e00ff000 r4:ffffffff
[ 2.210000] [
[ 2.210000] [
[ 2.210000] [
[ 2.210000] r3:ffffffed r2:c03db148 r1:c0341f78 r0:c03db130
[ 2.210000] [
[ 2.210000] [
[ 2.210000] handlers:
[ 2.210000] [
[ 2.210000] Disabling IRQ #11
Can you give me some advice?
Best regard!
M T
Hilscher Gesellschaft für Systemautomation mbH
I am finding irq problem.
static irqreturn_t netx_irq(struct usb_hcd *hcd)
{
struct netx *netx = hcd_to_netx(hcd);
unsigned reg_val=0;
disable_irq(NETX_IRQ_USB);
netx_write(netx,REL_NETX_USB_PORT_STAT_CHG_EV ,PWRSC_EV);
return IRQ_HANDLED;
}
It can clear the PWRSC_EV interrupt ,may be disable_irq() stop interrupt occur.If I do not use disable_irq() ,it can't exit from Interrupt
Seems like an endless irq loop. Usually a driver clears all interrupts the device has asserted. In your code snippet you are just clearing the PWRSC_EV. Probably another irq source is still asserted? Maybe you should print out all irq status and mask registers to see which irqs are still present, when leaving your ISR.
Regards
MT
#define PWRSC_EV 0x00000080 //[7] power status change Event
static irqreturn_t netx_irq(struct usb_hcd *hcd)
{
printk("interrupt\n");
struct netx *netx = hcd_to_netx(hcd);
unsigned reg_val=0;
netx_write(netx,REL_NETX_USB_PORT_STAT_CHG_EV ,PWRSC_EV);
netx_write(netx,REL_NETX_USB_PORT_STAT_CHG_EV_MSK ,CDC_EM);
reg_val=netx_read(netx,REL_NETX_USB_PORT_STAT_CHG_EV_MSK);
printk("PORT_STAT_CHG_EV_MSK:0x%x\n",reg_val);
reg_val=netx_read(netx, REL_NETX_USB_PORT_STAT_CHG_EV);
printk("PORT_STAT_CHG_EV:0x%x\n",reg_val);
reg_val=netx_read(netx, REL_NETX_USB_PIPE_STAT);
printk("USB_PIPE_STAT:0x%x\n",reg_val);
reg_val=netx_read(netx, REL_NETX_USB_PORT_STAT);
printk("USB_PORT_STAT:0x%x\n",reg_val);
reg_val=netx_read(netx,REL_NETX_USB_CORE_CTRL);
printk("USB_CORE_CTRL:0x%x\n",reg_val);
return IRQ_NONE;
}
The result is same,PORT_STAT_CHG_EV is 0x0 it seems that no other interrupt occur,what is wrong?
PORT_STAT_CHG_EV_MSK:0x40 ,I have mask the interupt of PWRSC_EV .
here is the print result:
interrupt
[ 2.230000] PORT_STAT_CHG_EV_MSK:0x40
[ 2.230000] PORT_STAT_CHG_EV:0x0
[ 2.230000] USB_PIPE_STAT:0x340
[ 2.230000] USB_PORT_STAT:0x7
[ 2.230000] USB_CORE_CTRL:0x1a6bff0
the bit 24 reflect usb_irq is set ,there is interrupt
USB_PIPE_STAT:0x340
Error counter ,Does this will lead to interrupt?
M T
Hilscher Gesellschaft für Systemautomation mbH
First of all you should think about where to find active interrupts.
The interrupts forwarded to the VIC/ARM can be analyzed by looking at MAIN_EV / MAIN_EM. These are active interrupts signalled by the USB core. Then you can look deeper into the core, depending if it was a Port/Pipe or any other event.
The registers you've dumped are not suitable to detect any active IRQ.
Regards
MT
MT,Thank you !
The Global pipe transfer event bit in MAIN_EV register is set,so the interrupt is generated though the bit PWRSC_EV is cleared !
Dear MT:
When I read the reigister USB_ID ,the value is 0x 701,the default is 0x700.
It is a read only register.It is strange.Is there any thing wrong?
Andreas Jacob
Hilscher Gesellschaft fuer Systemautomation mbH
Hi,
as you can see in the PRG it is a read only register.
Why it is strange. In netX is a higher revision included as it is written in the manual.
In other words it is a mistake in the manual.
Oh,dear AJ
where is the newest program reference?
I do not find the link in support->download.
the newest version in hilscher.cn is 04/20/2007
Andreas Jacob
Hilscher Gesellschaft fuer Systemautomation mbH
Hi Wangl,
please have a look at http://www.hilscher.com -> netX -> Downloads -> Manuals -> netX
But the latest version is Rev 0.4 from 04/20/2007.
Dear AJ
when I intend to reset the device connected to my host interface,
I write '1 ' to the register USB_PORT_CTRL URESET field,and I use the timer list to look up the value of this register after 50 ms later,the value is
[ 48.840000] USB_PORT_CTRL:0x44
it fail to reset the device,what is the reason?
I intended to start a control transaction setup stage
value=netx_read(netx, REL_NETX_USB_PIPE_STAT);
printk("USB_PIPE_STAT:0x%x\n",value);
netx_write(netx,REL_NETX_USB_PIPE_CTRL, ACT|TPID_SETUP);mdelay(2);
value=netx_read(netx, REL_NETX_USB_PIPE_STAT);
printk("2_USB_PIPE_STAT:0x%x\n",value);
however ,before this sentence (the red sentence )the value of register:
[ 48.930000] USB_PIPE_STAT:0x300
[ 48.930000] PORT_STAT:0x27
after this sentence
[ 48.930000] 2_USB_PIPE_STAT:0x200
In the introduction of USB_PIPE_STAT register :
bit 6 ACTS It will be set, after the Activate Pipe Bit was set to 1. Why this bit not set to 1?
There is an interrupt after I write this register show that after this
[ 48.930000] USB_PIPE_CTRL:0x2
there is erro exist! Because the field CERR of PIPE_STAT register is decrease from 3 to 2.
Can you give me some advice?
thank you !
M T
Hilscher Gesellschaft für Systemautomation mbH
Currently I am starting to wonder, if you even tried to read the USB core documentation which is available on the Hilscher Homepage ("netX FHG USB OTGDRD Description").
It clearly states what you need to do with the USB core.
Dear AJ
when I intend to reset the device connected to my host interface,
I write '1 ' to the register USB_PORT_CTRL URESET field,and I use the timer list to look up the value of this register after 50 ms later,the value is
[ 48.840000] USB_PORT_CTRL:0x44
it fail to reset the device,what is the reason?
netX does not clear this bit automatically. Software is responsible to clear it. (See USB core documentation p. 4-10).
I intended to start a control transaction setup stage
value=netx_read(netx, REL_NETX_USB_PIPE_STAT);
printk("USB_PIPE_STAT:0x%x\n",value);
netx_write(netx,REL_NETX_USB_PIPE_CTRL, ACT|TPID_SETUP);mdelay(2);
value=netx_read(netx, REL_NETX_USB_PIPE_STAT);
printk("2_USB_PIPE_STAT:0x%x\n",value);however ,before this sentence (the red sentence )the value of register:
[ 48.930000] USB_PIPE_STAT:0x300
[ 48.930000] PORT_STAT:0x27
after this sentence
[ 48.930000] 2_USB_PIPE_STAT:0x200
In the introduction of USB_PIPE_STAT register :
bit 6 ACTS It will be set, after the Activate Pipe Bit was set to 1. Why this bit not set to 1?There is an interrupt after I write this register show that after this
[ 48.930000] USB_PIPE_CTRL:0x2
there is erro exist! Because the field CERR of PIPE_STAT register is decrease from 3 to 2.Can you give me some advice?
thank you !
No Data Transaction without a valid data buffer. How should the core know what data to send for the setup transaction? (Documentation page 4-13)
Regards
MT
netX does not clear this bit automatically
however ,it said that "because hardward will clear the bit if it has completed the reset sequence" in the program reference guide page 117.
No Data Transaction without a valid data buffer. How should the core know what data to send for the setup transaction? (Documentation page 4-13)
I write data to the buffer before active the pipe!
len = sizeof(struct usb_ctrlrequest);
netx_write_buf(netx, 0, len,urb->setup_packet );//urb->setup_packet contain the data send to device (request of get descriptor)
buf=netx->usb_fifo;
/* select pipe #0 */
netx_write(netx,REL_NETX_USB_PIPE_SEL, 0);
/* set the max packet size */
netx_write(netx,REL_NETX_USB_PIPE_CFG, Usb_Ep0_PacketSize|IOT);
/* set the endpoint number */
netx_write(netx,REL_NETX_USB_PIPE_ADDR, 0);
/* set the data pointer to Usb_Ep0_Buffer */
netx_write(netx,REL_NETX_USB_PIPE_DATA_PTR, Usb_Ep0_Buffer>>2);
/* data buffer valid, ready to send bytes */
netx_write(netx,REL_NETX_USB_PIPE_DATA_TOT,DBV|len);
now the printed message after the interrupt is :
irq:USB_PIPE_EV:0x1
[ 404.410000] PORT_STAT_CHG_EV:0x20
[ 404.410000] PIPE_DATA_PTR:0x0
[ 404.410000] PIPE_DATA_TOT:0x0
[ 404.410000] USB_MAIN_EV:0x5
[ 404.410000] USB_PORT_CTRL:0x50
[ 404.410000] USB_PIPE_CTRL:0x6
[ 404.410000] USB_PIPE_STAT:0x340(
Though USB_PIPE_STAT:0x340 show that the transaction didn't failed ,however USB_PIPE_CTRL:0x6 show that the activepipe bit is not cleared.
In page 121 "the bit will be cleared automatically if the transfer is finished".Does it need software to clear it again ?
M T
Hilscher Gesellschaft für Systemautomation mbH
I assume you haven't configured the USB core to Host Mode correctly (probably some error in the bitmasks?), as the same happens when I keep PSE / ASE disabled. Otherwise it works OK.
These are the steps I've done:
1. Set GPIO12 to low
2. Hardreset USB core through CORE_CTRL
3. Set USB_CTRL to 0x1C
4. Confirm Power IRQ write 0x80 to PSC_EV
5. Set URESET for at least 20ms
6. Select Pipe 0
7. Set PIPE_CFG to 0x40000040 (MPS=64, IOT=1, ET=Control)
8. Set PIPE_ADDR to 0 (EP=0, Addr=0)
9. Set PIPE_DATA_TBYTES to 0x80000008 (DBV=1, LEN=8)
10. Set PIPE_CTRL to 0x3 (ACT=1, TPID=SETUP)
ACTS and ACT are correctly cleared by hardware here. (Besides this is not a complete setup transaction, as the data stage and acknowledge are missing. These stages must be done in software.
Regards
MT
10. Set PIPE_CTRL to 0x3 (ACT=1, TPID=SETUP)
Here should be 0x6 ,if ACT=1, TPID=SETUP
Now ,it can clear rightly,however when I sent the get descriptor request to my usb disk, by writing buf
netx_write_buf(netx, 0, len,urb->setup_packet );( I write data to physical address 0x00130000 which is mapped in linux.)
netx_write(netx,REL_NETX_USB_PIPE_DATA_TOT,DBV|0x8);
/* activate the pipe and set direction to 'setup' */
netx_write(netx,REL_NETX_USB_PIPE_CTRL, ACT|TPID_SETUP);
value=netx_read(netx, REL_NETX_USB_PORT_CTRL);
netx_write(netx, REL_NETX_USB_PORT_CTRL,value|PENA);
afer interupt ,I read the buf , data is 0x80,0x6,0x0,0x1,0x0,0x0,0x40,0x0
and the PIPE_CTRL is 0x2,so I begin the in packet to read the descriptor get from usb disk.
how ever the data buf is not change:
static void in_packet(
struct netx *netx,
struct netx_ep *ep,
struct urb *urb,
u8 bank,
u8 control)
{
netx_write(netx,REL_NETX_USB_PIPE_ADDR, 0);
netx_write(netx,REL_NETX_USB_PIPE_DATA_TOT,DBV|0x40);
netx_write(netx,REL_NETX_USB_PIPE_DATA_PTR, Usb_Ep0_Buffer>>2);
netx_write(netx,REL_NETX_USB_PIPE_CTRL, ACT|TPIN_IN);
}
there is also a interrupt after this function .
I read the buf in the interrupt:
netx_read_buf(netx, 0x0,32,buf);
for(i=0;i<32;i++)
{
printk("0x%x,",*(buf+i));
};
[ 39.920000]0x80,0x6,0x0,0x1,0x0,0x0,0x40,0x0,0x83,0x97,0xd0,0xe1,0x96,0x64,0x98,0xca,0x78,0x9d,0xd0,0x51,0x8f,0xa,0xe3,0xb,0x1e,0x59,0x3,0x2b,0x14,0xaa
It show that the OTG do not get the descrptor!The buf is not changed!However the PIPE_CTRL is 0x1 in interrupt routine.
MT ,How to start a In packet transaction using OTG?
thank you!
M T
Hilscher Gesellschaft für Systemautomation mbH
39.920000]0x80,0x6,0x0,0x1,0x0,0x0,0x40,0x0,0x83,0x97,0xd0,0xe1,0x96,0x64,0x98,0xca,0x78,0x9d,0xd0,0x51,0x8f,0xa,0xe3,0xb,0x1e,0x59,0x3,0x2b,0x14,0xaa
It show that the OTG do not get the descrptor!The buf is not changed!However the PIPE_CTRL is 0x1 in interrupt routine.
MT ,How to start a In packet transaction using OTG?
thank you!
Sure it is not changed. The USB core does send a Setup Packet on the USB port and that's about it.
A Control Transfer, as you are trying to setup, consists of several data stages (Setup Stage, Data Stage, Status Stage), depending on the Request:
- GET Requests
1. Setup Packet
2. IN Packet
3. ACK Packet (empty OUT Packet)
- SET Requests
1. Setup Packet
2. OUT Packet (If data needs to be send)
3. ACK Packet (empty IN packet)
All threee data stages must be implemented by the user and will not automatically be executed by the USB core. See http://www.beyondlogic.org/usbnutshell/usb4.htm for the different transfer types.
Regards
MT
Sure it is not changed. The USB core does send a Setup Packet on the USB port and that's about it.
I do send a setup packet,and start the in packet ,however this stage is failed !What is the main reason?
Can you give a clearly cue?
M T
Hilscher Gesellschaft für Systemautomation mbH
static void in_packet(
struct netx *netx,
struct netx_ep *ep,
struct urb *urb,
u8 bank,
u8 control)
{
netx_write(netx,REL_NETX_USB_PIPE_ADDR, 0);
netx_write(netx,REL_NETX_USB_PIPE_DATA_TOT,DBV|0x40);
netx_write(netx,REL_NETX_USB_PIPE_DATA_PTR, Usb_Ep0_Buffer>>2);
netx_write(netx,REL_NETX_USB_PIPE_CTRL, ACT|TPIN_IN);
}
there is also a interrupt after this function .
I read the buf in the interrupt:
netx_read_buf(netx, 0x0,32,buf);
for(i=0;i<32;i++)
{
printk("0x%x,",*(buf+i));
};
It is not sufficient to say "You get an interrupt". What is the status etc.? You need to evaluate the reason for the interrupt, probably it was a stall from the device, or something else.
Regards
MT
What is the status etc.? You need to evaluate the reason for the interrupt, probably it was a stall from the device, or something else.
Dear MT :
the Pipe Status Register is 0x340 or 0x304 when I read it in interrupt routine.It seem that no erro occured .There is no register in the OTG register group to show what erro occur , such as STALL and other status!
M T
Hilscher Gesellschaft für Systemautomation mbH
Hi wangl,
Here's some straight forward sample code, which works here, maybe it gives you a clue, why your transfers are not working.
NOTE: The sample code is provided as is, and without warranty. Structure definitions and defines are not posted, as this would be too much.
static volatile unsigned long* s_pulUsbFifo = (volatile unsigned long*)Addr_usb_fifo; static USB_REGISTERS* s_ptUsbRegs = (USB_REGISTERS*)Addr_usb_core;static const unsigned char s_abGetDescr[] = {0x80,0x6,0x0,0x1,0x0,0x0,0x40,0x0};
int main(void)
{
unsigned long ulIdx;
unsigned long* pulGetDescr = (unsigned long*)s_abGetDescr;
/* Switch GPIO12 to output high, to enable USB Host */
*(volatile unsigned long*)Adr_gpio_cfg12 = 0x01;
/* soft reset the USB core */
s_ptUsbRegs->ulCoreControl = MSK_usb_core_ctrl_reset;
s_ptUsbRegs->ulCoreControl = 0;
/* Enable Host mode */
s_ptUsbRegs->ulControl = MSK_USB_CTRL_PSE | MSK_USB_CTRL_ASE | MSK_USB_CTRL_HRS;
s_ptUsbRegs->ulPortControl = MSK_PORT_CTRL_VB_ON | MSK_PORT_CTRL_TERM_ENA;/* Wait for device connect event */
while((s_ptUsbRegs->ulPortStateChange & MSK_PSC_EV_CDC) == 0) ;
s_ptUsbRegs->ulPortStateChange = MSK_PSC_EV_CDC;
/* Reset remote USB device.
NOTE: PENA does not need to be set, as the port will automatically be
activated, once the reset flag is cleared */s_ptUsbRegs->ulPortControl |= MSK_PORT_CTRL_URESET;
/* NOTE: We must keep reset for at least 10ms */
for(ulIdx=0;ulIdx < 200000;++ulIdx) ;
s_ptUsbRegs->ulPortControl &= ~MSK_PORT_CTRL_URESET;while(0 == (s_ptUsbRegs->ulPortStateChange & MSK_PSC_EV_URES)) ;
s_pulUsbFifo[0] = pulGetDescr[0];
s_pulUsbFifo[1] = pulGetDescr[1];/* Control Transfer (Setup Stage) */
s_ptUsbRegs->ulPipeSelect = 0;
s_ptUsbRegs->ulPipeAddress = 0;
s_ptUsbRegs->ulPipeConfig = MSK_PIPE_CFG_ET_CTRL | (64 << SRT_PIPE_CFG_MPS);
s_ptUsbRegs->ulPipeTotalBytes = 0;
s_ptUsbRegs->ulPipeDataPointer = 0;
s_ptUsbRegs->ulPipeControl = MSK_PIPE_CTRL_TPID_SETUP;s_ptUsbRegs->ulPipeControl |= MSK_PIPE_CTRL_ACT;
s_ptUsbRegs->ulPipeTotalBytes = sizeof(s_abGetDescr) | MSK_PIPE_DATA_TBYTES_DBV;
/* Wait for Transfer to finish, TODO: Do error evaluation, in case something wents wrong */
while((s_ptUsbRegs->ulPipeEvent & 0x01) == 0) ;
s_ptUsbRegs->ulPipeEvent = 0x01;/* Data IN Transfer (Data Stage) */
s_ptUsbRegs->ulPipeControl = MSK_PIPE_CTRL_TPID_IN;s_ptUsbRegs->ulPipeControl |= MSK_PIPE_CTRL_ACT;
s_ptUsbRegs->ulPipeTotalBytes = 64 | MSK_PIPE_DATA_TBYTES_DBV;
/* Wait for Transfer to finish, TODO: Do error evaluation, in case something wents wrong */
while((s_ptUsbRegs->ulPipeEvent & 0x01) == 0) ;
s_ptUsbRegs->ulPipeEvent = 0x01;/* Data OUT Transfer (Ack. Stage) */
s_ptUsbRegs->ulPipeState |= MSK_PIPE_STAT_DT; /* Note This must be done with DT=1 as this is a USB Data1 Frame */
s_ptUsbRegs->ulPipeControl = MSK_PIPE_CTRL_TPID_OUT;s_ptUsbRegs->ulPipeControl |= MSK_PIPE_CTRL_ACT;
s_ptUsbRegs->ulPipeTotalBytes = MSK_PIPE_DATA_TBYTES_DBV;
/* Wait for Transfer to finish, TODO: Do error evaluation, in case something wents wrong */
while((s_ptUsbRegs->ulPipeEvent & 0x01) == 0) ;
s_ptUsbRegs->ulPipeEvent = 0x01;while(1)
{
ulIdx = ulIdx;
}
return 0;
}
Regards
MT
Dear MT:
Thank you ,The PCB board which is designed by our company is completed ,so I am debugging the board these days,I never debug USB for month,thank you for your help.I will analyze the code you provide later,after the CF CARD TRURE IDE support in UBOOT and linux is completed!
best regards!
wangl
Dear sir:
Have you tested this code ?
I am now restart the usb develop!
thanks!
best regards!
Dear MT:
I can read out descriptor such as device descriptor ,string descriptor from one type usb keyboard : model SK8115 which is made by Dell now.
Howerver another model L100,I can read out nothing ,and the pipe halt ,the pipe state register is 0x320 in the interrupt routine.
It puzzle me almost months .The erro counter is 3,show that there is no error ,why it halt?The get device request must be supported by every usb device , there is no reason the L100 keyboard do not support,it work right on our old product and my PC with ubuntu .
May be there is some bugs on the OTG?I found that the biggest usb fifo that netx500 can use is 4K,not from 0x130000 to 0x13ffff which is describe in the program reference guide,the RAW_CFG is 0xa ,the DW_CFG is 0x20, 10 bit to stand for address for a word,so the fifo size is 4k.
And it is strange that when I send the reset signal to the usb keyboard ,after the CDC interrupt occur, the pipe control register is 0x6, and the pipe status register is 0x340,it show that the pipe is active,I print the register value in my reset function as follow:
And the msleep() only sleep one time,the UReset interrupt occur.howerver ,when it read out the device descriptor ,the linux usb subsystem reset the usb device again, the sleep() function run about 5 times spend about 50ms.
.The urgent problem is why I can not read out anything from the L100 model usb keyboard and the pipe halt?
Can you do such a test using the Wince system and one type of usb keyboard then send me debug information?Do you test the low speed device in Wince on NXDB500?
I found that there is usb host driver in Wince system in the wince board.
static void netx_root_port_reset(struct netx * netx)
{
u32 tmp;
unsigned long flags, t;
const u32 mask = (1 << USB_PORT_FEAT_CONNECTION)
| (1 << USB_PORT_FEAT_ENABLE)
| (1 << USB_PORT_FEAT_LOWSPEED);
/* Root hub reset should be 50 ms, but some devices
want it even longer. */
t = jiffies + msecs_to_jiffies(100);
netx->ctrl1=netx_read(netx,REL_NETX_USB_PORT_CTRL);
netx->ctrl1 |= URESET;
netx_write(netx,REL_NETX_USB_PORT_CTRL, netx->ctrl1);
tmp=netx_read(netx,REL_NETX_USB_PORT_CTRL);
printk("1port_ctrl_0x%x\n",tmp);
tmp=netx_read(netx, REL_NETX_USB_PORT_STAT_CHG_EV);
printk("stat_chg_ev_0x%x\n",tmp);
msleep(10);
netx->ctrl1 &= ~URESET;
netx_write(netx,REL_NETX_USB_PORT_CTRL,netx->ctrl1);
while (time_before(jiffies, t)) {
spin_lock_irqsave(&netx->lock, flags);
if (netx->port1 & (1 << USB_PORT_FEAT_C_RESET)){
/* Reset lasts 10ms (claims datasheet) */
tmp=netx_read(netx,REL_NETX_USB_PORT_CTRL);
printk("port_ctrl_0x%x\n",tmp);
netx->port1 |= mask;
tmp = netx_read(netx, REL_NETX_USB_PORT_STAT);
if ((tmp & DLS)==0)// if not set ,it is full speed device,clear it
netx->port1 &= ~(1 << USB_PORT_FEAT_LOWSPEED);
tmp= GPIPE_EM|GPORT_EM;
netx_write(netx,REL_NETX_USB_MAIN_EV_MSK,tmp);
netx_write(netx, REL_NETX_USB_PIPE_EV_MSK ,0x00000000);
netx_write(netx, REL_NETX_USB_PIPE_SEL ,0);
tmp = netx_read(netx, REL_NETX_USB_PIPE_STAT);
printk("pipe_stat0x%x\n",tmp);
tmp = netx_read(netx, REL_NETX_USB_PIPE_CTRL);
printk("pipe_ctrl0x%x\n",tmp);
break;
}
spin_unlock_irqrestore(&netx->lock, flags);
printk("bf_sleep\n");
msleep(10);
printk("sleeped\n");
}
}
with best regards
thank you
wangl
M T
Hilscher Gesellschaft für Systemautomation mbH
Dear MT:
I can read out descriptor such as device descriptor ,string descriptor from one type usb keyboard : model SK8115 which is made by Dell now.
Howerver another model L100,I can read out nothing ,and the pipe halt ,the pipe state register is 0x320 in the interrupt routine.
It puzzle me almost months .The erro counter is 3,show that there is no error ,why it halt?The get device request must be supported by every usb device , there is no reason the L100 keyboard do not support,it work right on our old product and my PC with ubuntu .May be there is some bugs on the OTG?
I don't think the USB has a bug. Probably this device does not support Full Speed. Did you try to query it using Low Speed mode (see DLS flag in config registers)
I found that the biggest usb fifo that netx500 can use is 4K,not from 0x130000 to 0x13ffff which is describe in the program reference guide,the RAW_CFG is 0xa ,the DW_CFG is 0x20, 10 bit to stand for address for a word,so the fifo size is 4k.
The USB core documentation describes the maximum possible FIFO size. It depends on the implementation on chip how large this FIFO is. There are registers to read out the FIFO width and size. I think it's 2kB on netX100/500 with 8 Pipes max. (But I am not sure)
And it is strange that when I send the reset signal to the usb keyboard ,after the CDC interrupt occur, the pipe control register is 0x6, and the pipe status register is 0x340,it show that the pipe is active,I print the register value in my reset function as follow:And the msleep() only sleep one time,the UReset interrupt occur.howerver ,when it read out the device descriptor ,the linux usb subsystem reset the usb device again, the sleep() function run about 5 times spend about 50ms.
USB reset is defined to last at least 10ms (per USB specification). So 50ms is not that unusual. Probably the USB core internally uses pipe0 to perform the reset (just a guess), but this should be stated somewhere in the specification of the core.
Regards
MT
Dear MT:
>>I don't think the USB has a bug. Probably this device does not support Full Speed. Did you try to query it using Low Speed mode (see DLS >>flag in config registers)
I print the value of port state register in the netx_root_port_reset() ,it show the value is 0x167, it show Low speed device is connected ,so I set the EPS field of pipe configuration register! The usb keyboard is low speed device .It need the Low speed keep alive---Preamble send at full speed.Do you mean the L100 usb keyboard do not support the Preamble? But if it do not support this how it can work right on our old product?
>>USB reset is defined to last at least 10ms (per USB specification). So 50ms is not that unusual. Probably the USB core internally uses >>pipe0 to perform the reset (just a guess), but this should be stated somewhere in the specification of the core.
The specification of the OTG core do not state it ,the pipe 0 is active,If that mean If I need wait the pipe0 to be idle when I want to send the setup token with the 8 byte request to the usb keyboard via pipe0?
I request it again ,There is usb host Wince driver exist , Can you do a test on the nxdb500 board with a usb keyboard?
Or you have done it ?Which brand do you test? Dell,Logitech? Send me the test report ?
You say there is no bug on the NETX500 OTG ,however,you must prove it!
Show me something.It is so easy.
I do wonder about this.
Best regards
wangl
M T
Hilscher Gesellschaft für Systemautomation mbH
I request it again ,There is usb host Wince driver exist , Can you do a test on the nxdb500 board with a usb keyboard?
Or you have done it ?Which brand do you test? Dell,Logitech? Send me the test report ?
We've tested it some time ago using Windows CE5 and there is no test report about it.
It was a Dell PS/2 Keyboard attached through a USB<-->PS2 Converter from Sharkoon and a Dell USB Keyboard (I don't know the exact model number).
BTW: There are already customers attaching UMTS sticks to the netX USB Core and they do work, so I think a bug would have already occured / reported.
Regards,
MT
M T
Hilscher Gesellschaft für Systemautomation mbH
It seems like you don't trust that USB Host is working on netX and still trying to find a unknown (likely non-existing) bug in the USB core.
Attached you will find a trace from a Dell L100 USB Keyboard attached to a Windows CE Board (NXEB500-HMI), which is working.
BTW: I did not make a video of the keyboard working under CE, so I hope you trust me if I tell you it is working on the Board.
Regards
MT
It seems like you don't trust that USB Host is working on netX and still trying to find a unknown (likely non-existing) bug in the USB core.
Attached you will find a trace from a Dell L100 USB Keyboard attached to a Windows CE Board (NXEB500-HMI), which is working.
BTW: I did not make a video of the keyboard working under CE, so I hope you trust me if I tell you it is working on the Board.
Regards
MT
Dear MT：
we use isp1160 instead of the OTG on netx at that time.
I intend to reuse the OTG now,
I can read out all device descriptor,config descriptor, interface,endpoint descriptors ,string descriptors from a usb disk.
I compare the descriptors readout from netx OTG with the descriptors from ISP1160 ,it is the same.
However ,the strange thing is: after the linux usb core send setconfig request to USB disk,and then send the get maxLun to the USB disk ,then the core halt ,and I see the erro counter is 3,there is no error,but it get nothing ,and it can not work along the linux step.
I use ISP1160 find that the USB DISK support the get maxLun command,will not send the stall
It seems "a timer has run out ,the core halt ,can not work "
Do you meet this scenary ?
Best regards
wangl
M T
Hilscher Gesellschaft für Systemautomation mbH
However ,the strange thing is: after the linux usb core send setconfig request to USB disk,and then send the get maxLun to the USB disk ,then the core halt ,and I see the erro counter is 3,there is no error,but it get nothing ,and it can not work along the linux step.
I use ISP1160 find that the USB DISK support the get maxLun command,will not send the stall
It seems "a timer has run out ,the core halt ,can not work "
When looking at the documentation of the USB core of the netX page 5-6%5-7 should get some light into the dark. It shows what happens in Host mode, when the device stalls our request.
At the start of a transaction the error counter (CERR) is set to 3. On a NAK it is reset to 3. When a stall occurs, the error counter is not touched (usually at 3, as there shouldn't be any bad physical transactions) and the pipe is halted. This sound to match your observation. You should get an interrupt when the pipe is being halted (ACTS cleared by hardware), and you will need to pass this correctly to the upper layers, so that they can handle it.
So probably this device does not support multiple luns and stalls the request. (just an assumption)
Regards,
MT
>When looking at the documentation of the USB core of the netX page 5-6%5-7 should get some light into >the dark. It shows what happens in Host mode, when the device stalls our request.
yes,I do see the explain there.
>At the start of a transaction the error counter (CERR) is set to 3. On a NAK it is reset to 3. When a stall >occurs, the error counter is not touched (usually at 3, as there shouldn't be any bad physical transactions) >and the pipe is halted. This sound to match your observation.
Yes ,if it stall ,it means the device do not support this command.Because the Bulk only usb mass storage specification say that device do not support it will send stall to the host. So I use ISP1160 to get the info whether the usb disk support the get maxLun request.
>You should get an interrupt when the pipe is being halted (ACTS cleared by hardware), and you will need to >pass this correctly to the upper layers, so that they can handle it.
yes,I get the pipe interrupt,and pass the EPIPE to upper layer,then the linux usb core will send clear halt request to the device ,then linux usb core will send bulk in transaction to the device ,however ,the device do not respond anything right .Then it seems it run out the "time",then it can not work right .
>So probably this device does not support multiple luns and stalls the request. (just an assumption)
As I wrote ,I use the ISP1160 to prove that the the device support multiple luns.The device answer to the get multiple lun request to ISP1160.
If there is some other possibility?
Thank you !
Best regards
Wangl
M T
Hilscher Gesellschaft für Systemautomation mbH
Without a real USB bus trace it's hard to tell what is happening there. You just wrote that using ISP1160 you verify that it supports multiple luns.Did you verify that in the driver or do you just assume that, because the device works?
Probably there is something wrong with your bulk transfer, that the device does not answer?
Another thing which comes into my mind is the Data Toggle (DT, Data0/1). If this is handled wrong, I think the device may also stall the request or even don't answer, but I am not sure on this one. DT is specified by the ARM on the netX USB core.
Regards,
MT
Dear MT:
Thank you for your remind ,I found that there is some DT problem exist in my driver,I will check ,and retry!
Best regards!
Wangl
I verify it from the usb storage layer of linux in the file under driver/usb/storage/transport.c
/* Determine what the maximum LUN supported is */
int usb_stor_Bulk_max_lun(struct us_data *us)
{
int result;
/* issue the command */
us->iobuf[0] = 0;
result = usb_stor_control_msg(us, us->recv_ctrl_pipe,
US_BULK_GET_MAX_LUN,
USB_DIR_IN | USB_TYPE_CLASS |
USB_RECIP_INTERFACE,
0, us->ifnum, us->iobuf, 1, HZ);
US_DEBUGP("GetMaxLUN command result is %d, data is %d\n",
result, us->iobuf[0]);
it show the result is 1,and data is 0,the usb disk reply one byte to this command.
I correct the DT part of my host ,problem still exist. get max lun halted the OTG
Because the netx otg halted , I send EPIPE to the upper layer,
but both of two sentences successed .
usb_stor_clear_halt(us, us->recv_bulk_pipe);
usb_stor_clear_halt(us, us->send_bulk_pipe);
After that linux upper layer send one bulk out CBW to USB Disk, and send sucessfully ,do not halt,
then linux upper layer start bulk in, and all bulk in halted.
Maybe some other mistake exist.
Best regards
Wangl
Dear MT :
I use a usb bus trace and see the data on the bus,and find out a small error in my code related to write usb fifo.
Now ,I can mount the usb disk in my linux system , and I can see the file in the usb disk.
the usb OTG function is verified by me now.There is no bug exist in netx usb OTG.
Cheers! :)
however,temply I can only mount the Netac usb disk ,other brand such as kingston, the OTG can not
reset it using SE0.
wangl
2011.8.29
M T
Hilscher Gesellschaft für Systemautomation mbH
As I told you the netX USB Controller is NOT OHCI compatible (which is an abbreviation for openHCI).
So you won't find the OHCI registers as they are used in an OHCI driver.
The USB Register description can be found in the "netX Program Reference Guide" and "netX FHG USB OTGDRD Description" which are both downloadable from the Hilscher homepage, after registration.
Regards
MT