rcX BSP HIF driver example?
We have the rcX BSP and I want to use the HIF Driver. But there is no example for this functionality in the rcX BSP CD (at least in our version).
There are only this 3 examples:
- FlashDiskDemo
- TcpIpDemo_netx
- TcpIpDemo_PC
But none of them uses the DPM communication so there is nothing there?
I need to find out the correct usage of different elements in the setup structures (e.g. which element of RX_HIF_BLOCK_MODE enum to use on different channels).
The best way will be to have simple example of how to use the DrvHifInit() with minimal number of channels - probably only the SYSTEM and a COMMUNICATION channel (sample for structures RX_HIF_SET_T, RX_HIF_CHANNEL_T and RX_HIF_CHANNEL_BLOCK_T )?
Thank you.
I am not using Hilscher stacks - we are writing our own netX stack and application. We will comply with suggested DPM layout (e.g., we will have system channel and more than one communication channels).
But I have to call the HIF driver with corrent intialization values of the structures - so I need some examples how to get started.
The included documentation is not enough - I have to reverse engineer the actions that the functions perform to understand them.
It might be easier simply to write own driver instead of wondering how the rcX HIF drivers works ?
Andreas Jacob
Hilscher Gesellschaft fuer Systemautomation mbH
Hi krasimirr,
enclosed are some code snippets:
config.c:
/*
************************************************************
* Configuration of the HIF-Instances
************************************************************
*/
STATIC CONST FAR RX_HIF_SET_T atrXHif[] = {
{{"DPM",RX_PERIPHERAL_TYPE_HOST,0},
RX_HIF_MODE_DPM_UP8BIT, /* Set the HIF to work in 8 Bit Dualport-Memory mode */
0x33FFE000, /* Configure specific HIF-PIO HIF */
0x000E7E67, /* Configure specific HIF-PIO to be HIF */
0x00000000, /* Configure HIF-PIO 32 to 63 Output-Driver, no relevance */
0x00000000, /* Configure HIF-PIO 64 to 84 Output-Driver, no relevance */
0x20244912, /* Configure the 8 Bit DPM Mode */
0x01000000, /* Configure Arm specific configuration */
0x10000, /* Total size of the whole Dualport Memory */
TRUE, /* require always the use of the handshake block */
FALSE, /* keep HIF registers as set by ROM bootloader */
0, /* Number of Area Blocks 0 to maximum 7 defined below */
NULL,
0x10010000, /* INTRAM block to use by HIF */
32768
}
};
/*
************************************************************
* Definition of the Interrupt-Instances
************************************************************
*/
STATIC CONST FAR RX_INTERRUPT_SET_T atrXInt[] = {
{
{"SYSTIMER",RX_PERIPHERAL_TYPE_INTERRUPT,0}, /* System Timer interrupt */
SRT_NETX_VIC_IRQ_STAT_timer0, /* Use external Timer0 Interrupt */
29, /* Priority 29 */
RX_INTERRUPT_MODE_SYSTEM, /* Allow interrupt to be a thread */
RX_INTERRUPT_EOI_AUTO, /* EOI self by RX */
RX_INTERRUPT_TRIGGER_RISING_EDGE, /* Edge triggered */
RX_INTERRUPT_PRIORITY_STANDARD, /* Normal Priority */
RX_INTERRUPT_REENTRANCY_ENABLED, /* Interrupt itself is reentrant */
},
{{"HIF",RX_PERIPHERAL_TYPE_INTERRUPT,0}, /* Dualport, Instance 0 */
SRT_NETX_VIC_IRQ_STAT_hif, /* Use HIF Interrupt */
24, /* Priority 24 */
RX_INTERRUPT_MODE_TASK, /* Allow interrupt to be treated as task */
RX_INTERRUPT_EOI_AUTO, /* EOI self by RX */
RX_INTERRUPT_TRIGGER_RISING_EDGE, /* Edge triggered */
RX_INTERRUPT_PRIORITY_STANDARD, /* Normal Priority */
RX_INTERRUPT_REENTRANCY_DISABLED, /* Interrupt itself is not reentrant */
TSK_PRIO_8, /* Task Priority */
TSK_TOK_8, /* Task Token */
1024 /* Task Stack Size */
},
};
/*
***************************************************************************
* Peripheral Driver Configuration loaded after the Kernel has been started
***************************************************************************
*/
STATIC CONST FAR RX_DRIVER_PERIPHERAL_CONFIG_T atrXDrvCfgPost[] = {
{DrvHifInit,RX_PERIPHERAL_TYPE_HOST,atrXHif,MAX_CNT(atrXHif)},
};
/*
***************************************************************************
* Definition of the customized DPM channels
***************************************************************************
*/
CONST STATIC RX_HIF_CHANNEL_BLOCK_T atSubblocks[]=
{
{
"CONTROL", /* Logical Name of the Subblock */
0, /* Instance of the subblock */
RX_HIF_BLOCK_TYPE_PARAMETER, /* Type of Subblock */
RX_HIF_BLOCK_TRANS_DPM, /* Type of Block */
0x0008, /* Relative Offset of Subblock within the Area */
8, /* Size of the Subblock */
RX_HIF_BLOCK_DIR_FROMHOST, /* Direction */
2, /* Handshake bit position */
RX_HIF_BLOCK_MODE_HOST_CONTROL, /* Handshake */
},
{
"COMMON_STATUS", /* Logical Name of the Subblock */
0, /* Instance of the subblock */
RX_HIF_BLOCK_TYPE_STATUS, /* Type of Subblock */
RX_HIF_BLOCK_TRANS_DPM, /* Type of Block */
0x0010, /* Relative Offset of Subblock within the Area */
64, /* Size of the Subblock */
RX_HIF_BLOCK_DIR_TOHOST, /* Direction */
3, /* Handshake bit position */
RX_HIF_BLOCK_MODE_DEVICE_CONTROL, /* Handshake */
},
{
"EXT_STATUS", /* Logical Name of the Subblock */
0, /* Instance of the subblock */
RX_HIF_BLOCK_TYPE_PORT_STATE, /* Type of Subblock */
RX_HIF_BLOCK_TRANS_DPM, /* Type of Block */
0x0050, /* Relative Offset of Subblock within the Area */
432, /* Size of the Subblock */
RX_HIF_BLOCK_DIR_TOHOST, /* Direction */
RX_HIF_HANDSHAKE_NONE, /* Handshake bit position */
RX_HIF_BLOCK_MODE_NO_CONTROL, /* Handshake */
},
{
"FROMHOSTMBX", /* Logical Name of the Subblock */
0, /* Instance of the subblock */
RX_HIF_BLOCK_TYPE_MAILBOX, /* Type of Subblock */
RX_HIF_BLOCK_TRANS_DPM, /* Type of Block */
0x0200, /* Relative Offset of Subblock within the Area */
1600, /* Size of the Subblock */
RX_HIF_BLOCK_DIR_FROMHOST, /* Direction */
4, /* Handshake bit position */
RX_HIF_BLOCK_MODE_HOST_CONTROL, /* Handshake */
TSK_PRIO_IVLD,
TSK_TOK_IVLD
},
{
"TOHOSTMBX", /* Logical Name of the Subblock */
0, /* Instance of the subblock */
RX_HIF_BLOCK_TYPE_MAILBOX, /* Type of Subblock */
RX_HIF_BLOCK_TRANS_DPM, /* Type of Block */
0x0840, /* Relative Offset of Subblock within the Area */
1600, /* Size of the Subblock */
RX_HIF_BLOCK_DIR_TOHOST, /* Direction */
5, /* Handshake bit position */
RX_HIF_BLOCK_MODE_DEVICE_CONTROL, /* Handshake */
TSK_PRIO_IVLD,
TSK_TOK_IVLD
},
{
"STD_OUTPUT", /* Logical Name of the Subblock */
0, /* Instance of the subblock */
RX_HIF_BLOCK_TYPE_IO, /* Type of Subblock */
RX_HIF_BLOCK_TRANS_DPM, /* Type of Block */
0x1000, /* Relative Offset of Subblock within the Area */
1024, /* Size of the Subblock */
RX_HIF_BLOCK_DIR_FROMHOST, /* Direction */
6, /* Handshake bit position */
RX_HIF_BLOCK_MODE_HOST_CONTROL, /* Handshake */
},
{
"STD_INPUT", /* Logical Name of the Subblock */
0, /* Instance of the subblock */
RX_HIF_BLOCK_TYPE_IO, /* Type of Subblock */
RX_HIF_BLOCK_TRANS_DPM, /* Type of Block */
0x1400, /* Relative Offset of Subblock within the Area */
1024, /* Size of the Subblock */
RX_HIF_BLOCK_DIR_TOHOST, /* Direction */
7, /* Handshake bit position */
RX_HIF_BLOCK_MODE_HOST_CONTROL, /* Handshake */
},
};
const static RX_HIF_CHANNEL_T tChannel =
{
"CHANNEL_x", 0,
RX_HIF_CHANNEL_LAYOUT_COM_CHANNEL,
RX_HIF_CHANNEL_HDSHK_MODE_16BIT,
0x2000,
MAX_CNT(atSubblocks),
atSubblocks,
};
/*
***************************************************************************
* Middleware Configuration loaded after the Kernel has been started
***************************************************************************
*/
STATIC CONST FAR RX_MIDDLEWARE_CONFIG_T atrXMidCfgPost[] = {
{MidDatabaseInit},
{MidSysInit},
{MidSysDpmInit, tChannel, MAX_CNT(tChannel)},
};
/*
************************************************************
* Configuration of the MidSys Dualport Instances
************************************************************
*/
CONST FAR MID_SYS_DPM_SET_T atrXMidSysDpmInit[] =
{
{
{
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}
},
0,
0, /* Number of Dualport channel */
1,
&tChannel
},
};
xxx_Resources.c:
RX_HIF_AREA_SUBBLOCK_T tSubBlkCfg;
TLR_UINT8 szChannelName[] = "CHANNEL_0";
/* identify all default areas */
Drv_HifIdentifyHif("DPM",0,&ptRsc->tLoc.hDPMHif);
szChannelName[8] = 0x30 + ptRsc->tLoc.ulDPMChannelNum;
eRslt = Drv_HifIdentifyArea((STRING*)szChannelName,
0,
&ptRsc->tLoc.tDpmRsc.hPortArea);
if(TLR_S_OK != eRslt) goto leave;
ptRsc->tRem.tIOInfo.ulNumIOBlockInfo = 2;
eRslt = Drv_HifIdentifySubblock("CONTROL",
0,
ptRsc->tLoc.tDpmRsc.hPortArea,
&ptRsc->tLoc.tDpmRsc.hControlArea);
if(TLR_S_OK != eRslt) goto leave;
Drv_HifGetSubblockBasePointer(ptRsc->tLoc.tDpmRsc.hControlArea, (UINT8**)&ptRsc->tLoc.tDpmRsc.ptControl);
eRslt = Drv_HifIdentifySubblock("COMMON_STATUS",
0,
ptRsc->tLoc.tDpmRsc.hPortArea,
&ptRsc->tLoc.tDpmRsc.hStatusArea);
if(TLR_S_OK != eRslt) goto leave;
Drv_HifGetSubblockBasePointer(ptRsc->tLoc.tDpmRsc.hStatusArea, (UINT8**)&ptRsc->tLoc.tDpmRsc.ptCommonStatus);
eRslt = Drv_HifIdentifySubblock("EXT_STATUS",
0,
ptRsc->tLoc.tDpmRsc.hPortArea,
&ptRsc->tLoc.tDpmRsc.hExtStatusArea);
if(TLR_S_OK != eRslt)
{
goto leave;
}
else
{
Drv_HifGetSubblockBasePointer(ptRsc->tLoc.tDpmRsc.hExtStatusArea, (UINT8**)&ptRsc->tLoc.tDpmRsc.pbExtStatus);
}
eRslt = Drv_HifIdentifySubblock("HP_OUTPUT",
0,
ptRsc->tLoc.tDpmRsc.hPortArea,
&ptRsc->tLoc.tDpmRsc.tHPOutputArea.hArea);
if(TLR_S_OK != eRslt)
{
ptRsc->tLoc.tDpmRsc.tHPOutputArea.hArea = NULL;
}
else
{
eRslt = Drv_HifGetSubblockInformation(ptRsc->tLoc.tDpmRsc.tHPOutputArea.hArea,
(void *)&ptRsc->tLoc.tDpmRsc.tHPOutputArea.pbData,
&tSubBlkCfg);
ptRsc->tLoc.tDpmRsc.tHPOutputArea.ulSize = tSubBlkCfg.ulSiz;
ptRsc->tLoc.tDpmRsc.tHPOutputArea.eHndShkMode = tSubBlkCfg.eMod;
if ((tSubBlkCfg.eMod == RX_HIF_SUBBLOCK_MODE_DEVICE_CONTROL) || (tSubBlkCfg.eMod == RX_HIF_SUBBLOCK_MODE_HOST_CONTROL))
{
if(TLR_S_OK != eRslt) goto leave;
if (tSubBlkCfg.eMod == RX_HIF_SUBBLOCK_MODE_DEVICE_CONTROL)
{
Drv_HifAccessSubblockDone(ptRsc->tLoc.tDpmRsc.tHPOutputArea.hArea);
}
}
}
eRslt = Drv_HifIdentifySubblock("HP_INPUT",
0,
ptRsc->tLoc.tDpmRsc.hPortArea,
&ptRsc->tLoc.tDpmRsc.tHPInputArea.hArea);
if(TLR_S_OK != eRslt)
{
ptRsc->tLoc.tDpmRsc.tHPInputArea.hArea = NULL;
}
else
{
eRslt = Drv_HifGetSubblockInformation(ptRsc->tLoc.tDpmRsc.tHPInputArea.hArea,
(void *)&ptRsc->tLoc.tDpmRsc.tHPInputArea.pbData,
&tSubBlkCfg);
ptRsc->tLoc.tDpmRsc.tHPInputArea.ulSize = tSubBlkCfg.ulSiz;
ptRsc->tLoc.tDpmRsc.tHPInputArea.eHndShkMode = tSubBlkCfg.eMod;
if ((tSubBlkCfg.eMod == RX_HIF_SUBBLOCK_MODE_DEVICE_CONTROL) || (tSubBlkCfg.eMod == RX_HIF_SUBBLOCK_MODE_HOST_CONTROL))
{
if(TLR_S_OK != eRslt) goto leave;
if (tSubBlkCfg.eMod == RX_HIF_SUBBLOCK_MODE_DEVICE_CONTROL)
{
TLR_MEMSET(ptRsc->tLoc.tDpmRsc.tHPInputArea.pbData, 0, ptRsc->tLoc.tDpmRsc.tHPInputArea.ulSize);
Drv_HifAccessSubblockDone(ptRsc->tLoc.tDpmRsc.tHPInputArea.hArea);
}
}
}
eRslt = Drv_HifIdentifySubblock("STD_OUTPUT",
0,
ptRsc->tLoc.tDpmRsc.hPortArea,
&ptRsc->tLoc.tDpmRsc.tOutputArea.hArea);
if(TLR_S_OK != eRslt)
{
goto leave;
}
else
{
eRslt = Drv_HifGetSubblockInformation(ptRsc->tLoc.tDpmRsc.tOutputArea.hArea,
(void *)&ptRsc->tLoc.tDpmRsc.tOutputArea.pbData,
&tSubBlkCfg);
ptRsc->tLoc.tDpmRsc.tOutputArea.ulSize = tSubBlkCfg.ulSiz;
ptRsc->tLoc.tDpmRsc.tOutputArea.eHndShkMode = tSubBlkCfg.eMod;
ptRsc->tRem.tIOInfo.atIOBlockInfo[1].ulSubblockIndex = tSubBlkCfg.uInst;
ptRsc->tRem.tIOInfo.atIOBlockInfo[1].ulType = tSubBlkCfg.eTyp;//RCX_BLOCK_DATA_IMAGE;
switch(tSubBlkCfg.eDir)
{
case RX_HIF_BLOCK_DIR_TOHOST:
ptRsc->tRem.tIOInfo.atIOBlockInfo[1].usFlags = RCX_DIRECTION_IN;
break;
case RX_HIF_BLOCK_DIR_FROMHOST:
ptRsc->tRem.tIOInfo.atIOBlockInfo[1].usFlags = RCX_DIRECTION_OUT;
break;
case RX_HIF_BLOCK_DIR_FROMTOHOST:
ptRsc->tRem.tIOInfo.atIOBlockInfo[1].usFlags = RCX_DIRECTION_INOUT;
break;
}
ptRsc->tRem.tIOInfo.atIOBlockInfo[1].usReserved = 0;
ptRsc->tRem.tIOInfo.atIOBlockInfo[1].ulOffset = 0;
ptRsc->tRem.tIOInfo.atIOBlockInfo[1].ulLength = 0;
if ((tSubBlkCfg.eMod == RX_HIF_SUBBLOCK_MODE_DEVICE_CONTROL) || (tSubBlkCfg.eMod == RX_HIF_SUBBLOCK_MODE_HOST_CONTROL))
{
eRslt = Drv_HifEnableSubblock(ptRsc->tLoc.tDpmRsc.tOutputArea.hArea,
(void*)APS_Output_Callback,
ptRsc);
if(TLR_S_OK != eRslt) goto leave;
if (tSubBlkCfg.eMod == RX_HIF_SUBBLOCK_MODE_DEVICE_CONTROL)
{
Drv_HifAccessSubblockDone(ptRsc->tLoc.tDpmRsc.tOutputArea.hArea);
}
}
}
eRslt = Drv_HifIdentifySubblock("STD_INPUT",
0,
ptRsc->tLoc.tDpmRsc.hPortArea,
&ptRsc->tLoc.tDpmRsc.tInputArea.hArea);
if(TLR_S_OK != eRslt)
{
goto leave;
}
else
{
eRslt = Drv_HifGetSubblockInformation(ptRsc->tLoc.tDpmRsc.tInputArea.hArea,
(void *)&ptRsc->tLoc.tDpmRsc.tInputArea.pbData,
&tSubBlkCfg);
ptRsc->tLoc.tDpmRsc.tInputArea.ulSize = tSubBlkCfg.ulSiz;
ptRsc->tLoc.tDpmRsc.tInputArea.eHndShkMode = tSubBlkCfg.eMod;
ptRsc->tRem.tIOInfo.atIOBlockInfo[0].ulSubblockIndex = tSubBlkCfg.uInst;
ptRsc->tRem.tIOInfo.atIOBlockInfo[0].ulType = tSubBlkCfg.eTyp; //RCX_BLOCK_DATA_IMAGE;
switch(tSubBlkCfg.eDir)
{
case RX_HIF_BLOCK_DIR_TOHOST:
ptRsc->tRem.tIOInfo.atIOBlockInfo[0].usFlags = RCX_DIRECTION_IN;
break;
case RX_HIF_BLOCK_DIR_FROMHOST:
ptRsc->tRem.tIOInfo.atIOBlockInfo[0].usFlags = RCX_DIRECTION_OUT;
break;
case RX_HIF_BLOCK_DIR_FROMTOHOST:
ptRsc->tRem.tIOInfo.atIOBlockInfo[0].usFlags = RCX_DIRECTION_INOUT;
break;
}
ptRsc->tRem.tIOInfo.atIOBlockInfo[0].usReserved = 0;
ptRsc->tRem.tIOInfo.atIOBlockInfo[0].ulOffset = 0;
ptRsc->tRem.tIOInfo.atIOBlockInfo[0].ulLength = 0;
if ((tSubBlkCfg.eMod == RX_HIF_SUBBLOCK_MODE_DEVICE_CONTROL) || (tSubBlkCfg.eMod == RX_HIF_SUBBLOCK_MODE_HOST_CONTROL))
{
eRslt = Drv_HifEnableSubblock(ptRsc->tLoc.tDpmRsc.tInputArea.hArea,
(void*)APS_Input_Callback,
ptRsc);
if(TLR_S_OK != eRslt) goto leave;
if (tSubBlkCfg.eMod == RX_HIF_SUBBLOCK_MODE_DEVICE_CONTROL)
{
TLR_MEMSET(ptRsc->tLoc.tDpmRsc.tInputArea.pbData, 0, ptRsc->tLoc.tDpmRsc.tInputArea.ulSize);
Drv_HifAccessSubblockDone(ptRsc->tLoc.tDpmRsc.tInputArea.hArea);
}
}
}
/* Enable Initialisation Callback */
eRslt = Drv_HifEnableInitCallback(ptRsc->tLoc.tDpmRsc.hPortArea,
APS_InitCallback,
ptRsc);
if(TLR_S_OK != eRslt) goto leave;
/* Enable Bus On Callback */
eRslt = Drv_HifEnableBusOnCallback( ptRsc->tLoc.tDpmRsc.hPortArea,
APS_BusOnCallback,
ptRsc);
if(TLR_S_OK != eRslt) goto leave;
/* Enable Application Ready Callback */
eRslt = Drv_HifEnableAppReadyCallback(ptRsc->tLoc.tDpmRsc.hPortArea,
APS_AppReadyCallback,
ptRsc);
if(TLR_S_OK != eRslt) goto leave;
/* Enable Config Lock Callback */
eRslt = Drv_HifEnableLockConfigCallback(ptRsc->tLoc.tDpmRsc.hPortArea,
APS_ConfigLockCallback,
ptRsc);
if(TLR_S_OK != eRslt) goto leave;
Drv_HifSetComCosReady(ptRsc->tLoc.tDpmRsc.hPortArea, TRUE);
/* set the common status */
ptRsc->tLoc.tDpmRsc.ptCommonStatus->usVersion = NETX_STATUS_BLOCK_VERSION;
ptRsc->tLoc.tDpmRsc.ptCommonStatus->ulCommunicationState = RCX_COMM_STATE_NOT_CONFIGURED;
ptRsc->tLoc.tDpmRsc.ptCommonStatus->ulCommunicationError = RCX_S_OK;
ptRsc->tLoc.tDpmRsc.ptCommonStatus->usWatchdogTime = 0;
{
DRV_HIF_CHANNEL_INFO_DATA_T tChannelInfo;
tChannelInfo.usStructLength = sizeof(tChannelInfo);
tChannelInfo.usCommunicationClass = RCX_COMM_CLASS_SLAVE;
tChannelInfo.usProtocolClass = RCX_PROT_CLASS_xxx;
tChannelInfo.usProtocolConformanceClass = 0;
Drv_HifSetChannelInfoData(ptRsc->tLoc.tDpmRsc.hPortArea, &tChannelInfo);
}
leave:
if(eRslt == TLR_S_OK) {
/* init local done */
return TLR_DIAG_STA_OK;
} else {
/* init local failed */
return TLR_DIAG_STA_INIT_LOCAL_FAILED;
}
}
xxx_Process.c:
Drv_HifSetComCosReady(ptRsc->tLoc.tDpmRsc.hPortArea, TRUE);
Drv_HifChangeHandshkBit(ptRsc->tLoc.tDpmRsc.hPortArea,
NCF_COMMUNICATING_BIT_NO,
FALSE);
Drv_HifChangeHandshkBit(ptRsc->tLoc.tDpmRsc.hPortArea,
NCF_ERROR_BIT_NO,
FALSE);
Hi,
thank you for this example!
I will give it a try.
I have one question and I think that here is a good place to ask :
- how to specify "32-bit DPM mode" for the interface - there is no entry in the "enum RX_HIF_MODE_TYPEtag" for 32-bit; should I use the "RX_HIF_MODE_RSRVD1" value (we are using netX 50)? Or should I replace the entry with something like "RX_HIF_MODE_DPM_UP32BIT" in the enum typedef? Will this work?
Andreas Jacob
Hilscher Gesellschaft fuer Systemautomation mbH
Hi,
to setup a 32Bit DPM for netX50 you have to use the structure "RX_HIF_SET_Ttag". Here are the values ulMode0/1 and ulConf0/1 the important values.
Ok, I assume that this means that the RX_HIF_MODE_DPM_UP8BIT in your example:
STATIC CONST FAR RX_HIF_SET_T atrXHif[] = {
{{"DPM",RX_PERIPHERAL_TYPE_HOST,0},
RX_HIF_MODE_DPM_UP8BIT, /* Set the HIF to work in 8 Bit Dualport-Memory mode */
is not relevant.
Thank you.
I could be wrong but I see no reference to:
/*
************************************************************
* Configuration of the MidSys Dualport Instances
************************************************************
*/
CONST FAR MID_SYS_DPM_SET_T atrXMidSysDpmInit[] =
{
{
{
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}
},
0,
0, /* Number of Dualport channel */
1,
&tChannel
},
};
in the given code? What is the purpose of this structure and how it is supplied to the system?
I looked on the AP_MidSys.h and all files in BSP and rcX but I saw no function that uses this type of structure (MID_SYS_DPM_SET_T)?
Andreas Jacob
Hilscher Gesellschaft fuer Systemautomation mbH
Hi,
the structure atrXMidSysDpmInit is used by the CONST RX_MIDDLEWARE_CONFIG_T FAR atrXMidCfgPost[].
Which is then used by trXEnterKernelParam.
So, you mean that this is incorrect:
STATIC CONST FAR RX_MIDDLEWARE_CONFIG_T atrXMidCfgPost[] = {
{MidDatabaseInit},
{MidSysInit},
{MidSysDpmInit, tChannel, MAX_CNT(tChannel)},
};
Probably it should be:
STATIC CONST FAR RX_MIDDLEWARE_CONFIG_T atrXMidCfgPost[] = {
{MidDatabaseInit},
{MidSysInit},
{MidSysDpmInit, atrXMidSysDpmInit, MAX_CNT(atrXMidSysDpmInit)},
};
But atrXMidSysDpmInit is not an "array", so maybe:
{MidSysDpmInit, atrXMidSysDpmInit, 1 },
Sorry for these questions but the prototype of MidSysDpmInit() is:
RX_FATAL FAR MidSysDpmInit (void FAR* pvPar, UINT uPar);
and I can't get it right.
Andreas Jacob
Hilscher Gesellschaft fuer Systemautomation mbH
Probably it should be:STATIC CONST FAR RX_MIDDLEWARE_CONFIG_T atrXMidCfgPost[] = {
{MidDatabaseInit},
{MidSysInit},
{MidSysDpmInit, atrXMidSysDpmInit, MAX_CNT(atrXMidSysDpmInit)},
};
Yes this one is right.
atrXMidSysDpmInit is:
CONST FAR MID_SYS_DPM_SET_T atrXMidSysDpmInit[] =
{
{
{
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}
},
0,
0, /* Number of Dualport channel */
1,
&tChannel
},
}; Hi, as I wrote in the "Hostinterface" topic, I have problem with interrupt.
I followed your example (in the configuration part, I haven't used the TLR servicing task).
But when the EnterKernel() function is called, it hangs - neither it returns with fatal code nor the first (and only one) static task is started (I have breakpoints at both places) - debugger stays at "running".
If I stop the debugger, I see that usually it is servicing interrupt (I think something like ...DefaultInterruprWrapper).
At this point, I am placing a breakpoint at the first line of HalHifAreaInterrupt() function - when I resume execution it constantly goes to this breakpoint (multiple times - just like if the interrupt is not acknowledged).
If I check the value of "DPM_ARM_INT_STAT0" @0x1C0034E0 it is : 0x80100007. (In my configuration I have described one communication channel, so the value of DPM_ARM_INT_EN0 = 0x80000005 seems to be correct - areas 0 and 2 interrupts are enabled ).
In fact, at my board I have no HOST controller - the lines of DPM interface are routed to an FPGA that is not configured at all.
This might be the reason (the floating pins I mean) why I see some DPM interrupts pending - usually HS regs 0, 1, and 2 have interrupt flags set.
I made another experiment - when I stopped at HalHifAreaInterrupt, I wrote to register DPM_ARM_INT_STAT0 in order to acknowledge the interrupts - I wrote value of 0x00000005 (ack area 0 and 2 interrupt flags).
Then I resumed the execution and the tasks get started and running - no more stops at HalHifAreaInterrupt. I think this proves that there are no constant accesses to HS cell from the HOST side. I think that there is an interrupt pending that is not correctly acknowledged in the HIF driver (or MidSysDpm middleware).
Here is how the interrupt is configured:
{{"HIF",RX_PERIPHERAL_TYPE_INTERRUPT,0}, /* Dualport, Instance 0 */
SRT_NETX_VIC_IRQ_STAT_hif, /* Use HIF Interrupt */
26, /* Priority 28 */
RX_INTERRUPT_MODE_TASK/*RX_INTERRUPT_MODE_SYSTEM*/, /* Allow Interrupt to be a Thread*/
RX_INTERRUPT_EOI_AUTO, /* EOI Self by RX */
RX_INTERRUPT_TRIGGER_RISING_EDGE, /* Edge Triggered */
RX_INTERRUPT_PRIORITY_STANDARD, /* Normal Priority */
RX_INTERRUPT_REENTRANCY_DISABLED, /* Interrupt Itself is not Reentrant */
TSK_PRIO_53, /* Task Priority */
TSK_TOK_53, /* Task Token */
1024 /* Task Stack Size */
}
Here is the DPM config:
CONST RX_HIF_CHANNEL_T tChannel =
{
"CHANNEL_x", 0,
RX_HIF_CHANNEL_LAYOUT_COM_CHANNEL,
RX_HIF_CHANNEL_HDSHK_MODE_16BIT,
0x2000,
MAX_CNT(atSubblocks),
&atSubblocks[0],
};
/*
************************************************************
* Configuration of the MidSys Dualport Instances
************************************************************
*/
CONST FAR MID_SYS_DPM_SET_T atrXMidSysDpmInit[] =
{
{
{
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}
},
0,
0, /* Number of Dualport channel */
1,
&tChannel
}
};
CONST FAR RX_MIDDLEWARE_CONFIG_T atrXMidCfgPost[] = {
{MidDatabaseInit},
{MidSysInit},
// {MidSysDpmInit, &tChannel, 1},
{MidSysDpmInit, &atrXMidSysDpmInit, 1 },
};
And here is the HIF config:
CONST FAR RX_HIF_SET_T atrXHif1[] =
{
{{"DPM",RX_PERIPHERAL_TYPE_HOST,0},
RX_HIF_MODE_DPM_UP32BIT, /* Set the HIF to work in 32 Bit Dualport-Memory */
0xFFFFFFFF, /* ulMode0 - Configure specific HIF-PIO HIF - 32..63 are HOST */
0x003FFFFF, /* ulMode1 - Configure specific HIF-PIO to be HIF 64..85 are HOST */
0x00000000, /* ulDrvEn0 - Configure HIF-PIO 32 to 63 Output-Driver, no relevance */
0x00000000, /* ulDrvEn1 - Configure HIF-PIO 64 to 84 Output-Driver, no relevance */
0x5000E916, /* ulConf0 - Configure the 32 Bit DPM Mode */
0x01000000, /* ulConf1 - Configure Arm specific configuration */
0x8000,//0x10000, /* Total size - defined by address lines ???*/
TRUE, /* Always use handshake block */
FALSE, /* Don't keep the values from the bootloader in HIF regs */
0,//MAX_CNT(atrDPMChannels), /* Number of Area blocks 0 to maximum 7 */
NULL,//&atrDPMChannels[0], /* pointer to area configuration M0+SRAM1 banks */
DPM_MEMORY_BASE_ADDRESS, /* //0x10010000 - The HIF driver shall use the last INTRAM bank */
// TO DO: Synchronize memory layout with ETH_STD areas???
DPM_COMPLETE_SIZE, /* equal to 32768 */
}
};
STATIC CONST FAR RX_DRIVER_PERIPHERAL_CONFIG_T atrXDrvCfgPost[] = {
{DrvGpioInit, RX_PERIPHERAL_TYPE_GPIO, atrXGpio, MAX_CNT(atrXGpio)},
{DrvHifInit, RX_PERIPHERAL_TYPE_HOST, atrXHif1, MAX_CNT(atrXHif1)},
};
I think that the HIF driver should deal with this interrupts and it should perform the acknowledgement in the way I do it by hand?
I think there is no way to specify additional interrupt handler, or HIF driver callback, to perform this interrupt acknowledgement in my software (at least not before the EnterKernel returns :) ) ?
I also tried to not include the MidSysDpmInit line in middleware configuration array and to call this function in one of my tasks - behavior is similar - MidSysDpmInit() hangs and I have to stop the debugger and acknowledge the DPM Interrupts in order to continue).
Best regards.
Andreas Jacob
Hilscher Gesellschaft fuer Systemautomation mbH
Hi krasimirr,
is this problem still existing or could you solve it in the meantime?
Sorry for so late reply - yes, the problem is gone but I have no explanation why.
Andreas Jacob
Hilscher Gesellschaft fuer Systemautomation mbH
...yes, the problem is gone but I have no explanation why.
I assume, that your post was not recognized by someone.
But when you was able to solve it by your self, you are invited to share your experience in the topic you have started.
Yes, I know. The problem is not seen any more - but I am not able to say what was the reason that this is so. I mean that I haven't found any reasonable mistake to be fixed, but from some point of the time the interrupt is not making any more troubles. I have tried various ways and configuration (with BSP HIF, with MidSys, different task priorities and interrupt configuration and so on) and some of the changes fixed the interrupt behavior.
If I find the precise reason I will post what was wrong or missed.
Andreas Jacob
Hilscher Gesellschaft fuer Systemautomation mbH
Hi krasimirr,
no problem. Thanks in advance.
Ok, but now I have another problem - I am using the DPM Middleware, and as I far as I see, the System channel is created and serviced by this middleware.
How could I give notification to the middleware that our communication stack has finished its own initialization and is ready to operate - I mean that the NSF_READY bit in system handshake byte (usNetxSysFlags) stays at 0 and the cifx driver reports that netx is not ready. Is there a function that will perform this task? I found Drv_HifSetComCosReady() but as far as I can see, it is related to the particular communication channel and not to the system channel?
Also, I could "force" this bit using Drv_HifChangeHandshkBit() but I suppose this is not correct because the SYS channel is maintained by the middleware.
Generally speaking, when is the NSF_READY bit set - when MidSysDpmInit() is finished, when all communication channel have reached some level of initialization, when particular API functions is called, or I should control the usNetxSysFlags flags by myself?
Hi krasimirr and AJ,
I have got the same problem with HIF initialization.
I have next results:
I use next structure to initialise HIF:
RX_HIF_CHANNEL_T ParamChan[]=
{
...here I define my channels
}
STATIC CONST FAR RX_HIF_SET_T atrXHif[] =
{
{{"DPM",RX_PERIPHERAL_TYPE_HOST,0},
RX_HIF_MODE_DPM_UP16BIT,//RX_HIF_MODE_RSRVD1, // Set the HIF to work in 8 Bit Dualport-Memory mode
0x0010E6EF, //mode0 //0x00000000, // Configure specific HIF-PIO HIF
0x400E7C00, //mode1 //0x00000000, // Configure specific HIF-PIO to be HIF
0x00000000, // Configure HIF-PIO 32 to 63 Output-Driver, no relevance
0x00000000, // Configure HIF-PIO 64 to 84 Output-Driver, no relevance
0x3048692A, // Conf0 //0x00000000, // Configure the 8 Bit DPM Mode
0x01000000,//0x00000000, // Conf1 //Configure Arm specific configuration
0x10000, // Total size of the whole Dualport Memory
TRUE, // require always the use of the handshake block
FALSE, // keep HIF registers as set by bootloader
4,//RX_HIF_MAX_SUPPORTED_CHANNELS, // Number of Area Blocks 0 to maximum 7 defined below
&ParamChan[0],
0x10000,
0x10000
}
};
...
CONST FAR MID_SYS_DPM_SET_T atrXMidSysDpmInit[] =
{
{
{
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}
},
0,
0, /* Number of Dualport channel */
1,
&ParamChan[0]
},
};
STATIC CONST FAR RX_MIDDLEWARE_CONFIG_T atrXMidCfgPost[] =
{
{MidDatabaseInit},
{MidSysInit},
{MidSysDpmInit , atrXMidSysDpmInit, MAX_CNT(atrXMidSysDpmInit)},
}
After running of RcX:
erXFat = rX_SysEnterKernelExt(&trXEnterKernelParam);
my program executes while loop in "rX_FltFatalError" function which is a part of "librcx.a"
To get this I have traced program execution through "Disassemby" window and have got next sequence of RcX "calls":
T:0x8002C42C rX_SysEnterKernelExt
{call ( T:0x8002086C MidDatabaseInit)
return ok
call ( T:0x80026174 MidSysInit)
return okcall ( T:0x8002B1A4 MidSysDpmInit)
return okcall T:0x8002D4C4 rX_FltFatalError -> WHILE(1);
}
Here you can see names of called functions and their actual addresses.
As you can see after returning from "MidSysDpmInit" the RcX calls "rX_FltFatalError" which stays in while loop.
Screenshot is below:
As you can see it loops at 0x8002D4F6
When I perform initialisation of MiddleWare outside of "rX_SysEnterKernelExt" in my task everything works properly.
Please help me to solve the problem.
Hi,
I think you don't need to supply channel definition array to the atrXHif[] struct - use 0 and NULL for the size and the pointer - when MidSysDpmInit() is called, it will create the channels automatically.
There are some specific points - the HIF must be named "DPM", interrupt must be MODE_SYSTEM (and quite many other points that are undocumented).
Move calling of MidSysDpmInit() to some runtime code later in your tasks( DrvHifInit may stay in rcX enterkernel argument function) - this way you will see the returned error code and you can check in rX_Fatal.h what is wrong. Here are some reason that I have seen:
- incorrect HIF interrupt configuration;
- HIF interface not configured - you have to supply DrvHifInit in startup structure of the OS;
- memory allocation problems;
- and many more ...
Post the result of MidSysDpmInit() and will try to "guess" the problem if I have seen it.
If you find this helpful, could you check with my question http://board.hilscher.com/viewtopic.php?f=17&t=605 - probably we can help each other :D
Andreas Jacob
Hilscher Gesellschaft fuer Systemautomation mbH
Hi,
yes this is true. The rcX BSP does not include such an example.
Normally the DPM is needed in case of using a protocol stack on the netX. In that case are the requested structures in the protocol stack examples available.
But please keep in your mind, that the Hilscher stacks will support the standard Hilscher Dual Port Memory layout which is described into the Dual Port Memory manual.