Hi,
I want to transmit 16 word packet over SPI bus, from netX50 to slave device.
In rcX SPI example v2 I changed the size of the buffer arrays, and changed the argument of Drv_SpiSendReceive() function uLen to 32 (in bytes, as described in documentation). Burst block and delays are 0. SPI clock is set to 10MHz define in the Config.c file.
What I know is the netX SPI controller has 16 word deep FIFOs, so I expect that I can send these 16 words at once.
But what I observe on the SPI bus clock signal is that there are two bursts of pulses, separated by about 20-30 us pause. The length of every burst is about 12.9 us, so, at 10Mhz, this means that every burst has 128 clock periods. And 16 words (32 bytes) have 16 * 16 = 256 bits.
So, every burst has half of the data inside.
My question is why do I get this pause in between, when the FIFO is expected to be able to store all 16 words at once?
I suppose that the SPI driver is not designed (still) to handle this situation?
// send buffer to slave and receive response
erXRes = Drv_SpiSendReceive (hSpi, 32, bSendBuf, bRecBuf);
if( erXRes!=RX_OK)
{
return erXRes;
}
I also tested with Drv_SpiSend() function - it seems that it cannot handle more than 16 bytes at all (with uLen=32 I always get only one burst of 12.9us).
Best regards
Hi,
version is the one included in the rcX SPI Example project - I downloaded it this morning.
get_ver.bat returns this on librcx.a:
Contents of section .hilscher_version:
0000 20726358 2056322e 302e342e 32204b65 rcX V2.0.4.2 Ke
0010 726e656c 00000000 rnel....
And this on librcx_netx50.a:
Contents of section .hilscher_version:
0000 20726358 2056322e 302e342e 32206e65 rcX V2.0.4.2 ne
0010 74582035 30204472 69766572 73000000 tX 50 Drivers...
Update:
Just tried with rcX 2.0.4.5 - same problem.
Delay between the 2 bursts is about 42 us, burst 1 is 12,8 us, burst 2 is (about) 13us (this is observed on the CLK line). Period of the CLK signal is 100ns (10MHz).
Did you check the uBurstBlk in the config structure?
The documentation says:
Maximum number of bytes allowed to be sent to the slave device consecutively without any idle
or delay time.
Maybe this'll help.
Edit: Typo. It's friday...
Yep, burst block is set to 0 and burst delay is also set to 0.
I tried with different values of burst block - as far as I saw this is 2^uBurstBlk bytes - so I tried with 1, 2, 4 and 5 for this value, and 100 ticks for delay - nothing is changed on the waveform.
Yes, it's Friday, we will contact support in Monday.
Thanks.
Strange thing...
And what about the Data size select? Can you please check?
It's the "SPI 0 Control register 0" @ 1c000d00
Edit: It should be set to 8 bit. Please write the value for 16 bit to the register.
Hi, here is my code:
STATIC CONST FAR RX_SPISLAVE_SET_T atrXSpi[] =
{
{
{"SYSSPI",RX_PERIPHERAL_TYPE_SPI,0},
0, /* Bus port 0 */
1, /* Chip select 0 */
RX_SPI_MODE3, /* spi mode 3 */
RX_SPI_SPEED_10_0MHz, /* Speed is 1 Mhz */
0, /* No Burst block support */
0, /* No delay between bursts */
}
};
And:
#define SPI_TEST_DATA_SIZE 32
TLR_RESULT TaskProcess_rcX_SPI(RCX_SPI__RSC_T FAR* ptRsc)
{
TLR_RESULT eRslt; /* result */
TLR_HANDLE hQue; /* process queue short cut */
/* initialize local variables */
hQue = ptRsc->tLoc.hQue;
eRslt = TLR_S_OK;
RX_RESULT erXRes; // error code
RX_HANDLE hSpi;
UINT8 bSendBuf[SPI_TEST_DATA_SIZE];
UINT8 bRecBuf[SPI_TEST_DATA_SIZE];
/* process */
ptRsc->tLoc.eTskState = TLR_TASK_STATE_RUNNING;
// Get the Handle to a Spi slave named ‘SPI_DEMO’
erXRes = Drv_SpiIdentifySpi("SYSSPI",0,&hSpi);
if( erXRes!=RX_OK)
{
return erXRes;
}
// Set up the Spi slave object
erXRes = Drv_SpiInitializeSpi(hSpi);
if( erXRes!=RX_OK)
{
return eRslt;
}
// wait for exclusive access to the spi bus without a timeout
erXRes = Drv_SpiOpen(hSpi, RX_INFINITE);
if( erXRes!=RX_OK)
{
return erXRes;
}
while (1)
{
/*
// wait for exclusive access to the spi bus without a timeout
erXRes = Drv_SpiOpen(hSpi, RX_INFINITE);
if( erXRes!=RX_OK)
{
return erXRes;
}
*/
// select the slave
erXRes = Drv_SpiSlaveSelect(hSpi);
if( erXRes!=RX_OK)
{
return erXRes;
}
// send buffer to slave and receive response
erXRes = Drv_SpiSendReceive (hSpi, SPI_TEST_DATA_SIZE, bSendBuf, bRecBuf);
//erXRes = Drv_SpiSend (hSpi, SPI_TEST_DATA_SIZE, bSendBuf);
if( erXRes!=RX_OK)
{
return erXRes;
}
// deselect the slave
erXRes = Drv_SpiSlaveDeselect(hSpi);
if( erXRes!=RX_OK)
{
return erXRes;
}
rX_SysSleepTask(1);
}
// release exclusive access to the bus
erXRes = Drv_SpiClose(hSpi);
if( erXRes!=RX_OK)
{
return erXRes;
}
return RX_OK;
}
0x1C000D00 = 0x199C7 => 8-bit data size.
If we write 0x199CF to this register our problem gets solved - we get full 16 words without gap between bursts.
Thanks for your help, my conclusion is that SPI configuration structure needs one more element for data size.
A W
Hi Krasi,
what version of rcX do you use?
Regards
AW